DS34C86TN - Quad CMOS Differential Line Receiver

DS34C86TN - Quad CMOS Differential Line Receiver

DESCRIPTION
The DS34C86T is a quad differential line receiver

CMOS Design for Low Power designed to meet the RS-422, RS-423, and Federal ±0.2V Sensitivity Over the Input Commo Standards 1020 and 1030 for balanced and Mode Voltage Range unbalanced digital data transmission, while retaining Typical Propagation Delays: 19 ns the low power characteristics of CMOS. Typical Input Hysteresis: 60 mV The DS34C86T has an input sensitivity of 200 mV over the common mode input voltage range of ±7V. Inputs Won't Load Line when VCC = 0V Hysteresis is provided to improve noise margin and Meets the Requirements of EIA Standard RS- discourage output instability for slowly changing input 422 waveforms. TRI-STATE Outputs for System Bus The DS34C86T features internal pull-up and pull- Compatibility down resistors which prevent output oscillation on Available in Surface Mount unused channels. Open Input Failsafe Feature, Output High for Separate enable pins allow independent control of Open Input receiver pairs. The TRI-STATE outputs have 6 mA source and sink capability. The DS34C86T is pin compatible with the DS3486.